Digital Logic CSE 2340

Spring 2008 – Dr. Tiernan’s class

Review Sheet for Test #1

Ch. 2, Ch. 3, Ch. 4 through section 4.7 - does not cover “computer-aided” sections at end of 2 & 3

Feb. 24, 2008

 

Topics to understand and be able to use:

Be able to reduce/ simplify functions using Boolean algebra

Principle of duality

Be able to define a “switching algebra” in your own words

Meaning and use of

                  POS, SOP, canonical POS/SOP, minimum POS/SOP

                  maxterms, minterms

Shannon’s expansion theorem to create canonical forms

Truth tables

Venn diagrams

Differences for incompletely specified functions

Basic AND, OR, NOT gates

Primitive NAND, NOR gates

                  how these gates can be used in place of AND, OR, NOT

Karnaugh maps

Function minimization with algebraic methods or K-maps

Levels in circuit design (one level circuit, two level circuit, etc.)

Fan-in/fan-out

Hazards

                  Static and dynamic

Timing delay and propogation

Timing diagrams

Active-high/active-low

Encoder / Decoder

Multiplexer / Demux

Adder/ Half-Adder / Full-Adder

Comparator

 

 

Topics to be familiar with but not to apply:

Quine-McCluskey algorithm

Petrick’s algorithm