D Latch (continued)
Characteristic equation: this equation can be derived from that of the gated SR latch by substituting D for S and D for R: Q* = DC + CQ
When the enable signal is low, (C = 0), the equation reduces to
Q* = Q, meaning the latch is placed in hold mode (no change) operating mode with the latch holding the last value of D that was entered.
When the enable signal is high (C = 1), Q* = D, the excitation input D is gated directly to output Q (gated or enabled mode).
Fig. 6.17 illustrates the timing diagram for D latch operation.