Edge-triggered Flip-flop Timing Characteristics
To ensure proper operation of any edge-triggered flip-flop, the excitation inputs should not change immediately before or after the clock transition.
The value of D for the SN7474 is sampled and transferred to the flip-flop output Q at the exact instant the clock reaches its threshold value.
One should always make sure that the input is either logic 1 or 0 at this instant in time so that the flip-flop’s output Q will be the value planned in the system design.